The present invention is generally directed to a process for the deposition of gate electrode material in an inverted thin film field effect transistor. More particularly, the present invention is directed to the utilization of specific materials and processes in the fabrication of field effect transistors (FETs) used in matrix addressed liquid crystal displays (LCDs). Even more particularly, the present invention is directed to a simplified process for gate deposition in which problem of undercutting is mitigated and in which titanium gate material is hardened so that it is less affected by subsequent etching and processes which form the silicon islands.
The liquid crystal display device typically comprises a pair of flat panels preferably containing a quantity of liquid crystal material. These liquid crystal materials typically fall into two categories: dichroic dyes and a guest/host system or twisted nematic materials. The flat panels generally possess transparent electrode material disposed on their inner surfaces in predetermined patterns. One panel is often covered completely by a single transparent "ground plane" electrode. The opposite panel is configured with an array of transparent electrodes, referred to herein as "pixel" (picture element) electrodes. Thus, a typical cell in a liquid crystal display includes liquid crystal material disposed between a pixel electrode and a ground electrode forming, in effect, a capacitor-like structure disposed between transparent front and back panels. In general, however, transparency is only required for one of the two panels and the electrodes disposed thereon.
In operation, the orientation of liquid crystal material is affected by voltages applied- across the electrodes on either side of the liquid crystal material. Typically, voltage applied to the pixel electrode effects a change in the optical properties of the liquid crystal material. This optical change causes the display of information on the liquid crystal display (LCD) screen. In conventional digital watch displays and in some newer LCD display screens used in miniature television receivers, the visual effect is typically produced by variations in reflected light. However, the utilization of transparent front and back panels and transparent electrodes also permits visual effects to be produced by transmissive effects. These transmissive effects may be facilitated by separately powered light sources for the display, including fluorescent light type devices. LCD display screens may also be employed to produce color images through the incorporation of color filter mosaics in registration with the pixel electrode array. Some of the structures may employ polarizing filters to either enhance or provide the desired visual effect.
Various electrical mechanisms are employed to sequentially turn on and off individual pixel elements in an LCD display. For example, metal oxide varistor devices have been employed for this purpose. However, the utilization of thin film semiconductor switch elements is most relevant herein. In particular, the switch element of the present invention comprises an inverted, thin-film field effect transistor employing a layer of amorphous silicon. These devices are preferred in LCD devices because of their potentially small size, low power consumption, switching speeds, ease of fabrication, and compatibility with conventional LCD structures. The fabrication of these structures is typically accomplished with integrated circuit processing methods employing various stages of deposition masking and material etching. In general, the number of process steps is desired to be low since each added process step increases the probability of defects. In particular, the number of masking steps is desired to be low since, in general, the greater the process complexity, the lower is the reliability of the result, of the device and the process yield. In particular, the present invention is directed to a method for deposition of gate electrode material in such devices in a way in which the process is not only simplified but provides positive advantages for later processing steps.
In the fabrication of inverted thin film FETs, one of the first layers deposited and patterned is the layer defining the gate electrode and gate line patterns. In the past patterning of titanium gate material was accomplished using a wet etching operation. However, the wet etch was hard to control due to a titanium oxide surface layer which was etched much more slowly than the titanium itself. This often resulted in variable and sometimes severe undercutting. For example, in a 10 micron wide gate undercutting by as much as 2 microns occurred. Additionally, the wet etch of the titanium required the deposition of an initial silicon nitride layer to prevent etching of the underlying silicon dioxide or underlying substrate by the hydrogen fluoride-based wet titanium etch. The etching of the silicon dioxide layer during gate formation increases the step height that the gate insulator had to cover. It also adversely affects the surface of the glass so that its optical properties are degraded. The etching of this substrate is minimized by the additional deposition of a silicon nitride layer which etches much more slowly than the silicon dioxide layer. However, even the utilization of the silicon nitride deposition step is undesirable since the deposition can be affected by particulates and has a much slower throughput than the process described herein.
The undercut of the gate structure is particularly undesirable in FETs employed in the LCD devices contemplated herein. Due to the undercut of the gate structure, it can be difficult to align the source and drain mask with the gate structure. This can result in poor source and drain overlap and in many cases no overlap at all which destroys device performance. This results in low fabrication yield. This yield reduction was also further influenced by gate line thinning during etching of the amorphous silicon island areas in the display devices. It was also found that several wafers were lost because of extreme thinning of the titanium gate due to variability and etch time of the silicon islands. Such marginality in a process step is extremely detrimental to overall yield.